Some storage modules, such as solid-state drives (SSDs), contain a plurality of memory dies (e.g., in a multi-die package) that can be read or written in parallel. Such storage modules typically have a maximum power threshold that limits the number of operations that can be executed at any given time. For example, storage modules often need to minimize peak power consumption when simultaneously executing operations (e.g., erase operations) that have periodic power peaks. One way in which to manage peak power consumption is to limit the number of concurrent operations. While this approach guarantees the maximum power consumption is below a desired level, performance is limited by the number of allowed concurrent operations. Another way in which to manage peak power consumption is to stagger consecutive commands by a fixed time to avoid peak power consumption alignment. However, while staggering commands in this way can avoid alignment of the first peak, such staggering may not avoid alignment of subsequent peaks.
Additionally, memory operations often follow internal algorithms that can produce current consumption peaks, as current consumption peaks correlate to power peaks. When multiple memory dies operate in parallel (e.g., when multiple NAND dies are programmed), individual memory dies may have current peaks that align and generate very high instantaneous current consumption. Although the chance of all memory dies having their current peaks aligning at the same time is statistically low, some storage modules guard against this worst case scenario by intentionally degrading the performance of the memory to guarantee prevention of such peak alignment. Other storage modules address with by launching each microstep in a memory operation individually, but that approach requires high control bandwidth and bus utilization, which can result in performance degradation. Also, while memory dies can communicate with each other via hardware signals to align their operations, such hardware signals are usually bounded to package boundaries and are not optimized for multi-package devices.
Overview
Embodiments of the present invention are defined by the claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the below embodiments relate to a storage module and method for scheduling memory operations for peak-power management and balancing. In one embodiment, a storage module maintains a count of time slots over a period of time. The period of time corresponds to an amount of time between periodic power peaks of a memory operation. For each time slot, the storage module determines whether to commence a memory operation on one or more of the plurality of memory dies based on whether a power peak generated in the time slot by the memory operation would exceed a power threshold allowed for the time slot.
In another embodiment, a storage module is disclosed having a memory, a time slot counter, and a memory operation scheduler in communication with the memory and the time slot counter, wherein the memory operation scheduler is configured to determine whether to commence a memory operation in a given time slot counted by the time slot counter based on power already consumed in that time slot.
In another embodiment, a storage module is disclosed having a plurality of memory dies and a controller. Each of the memory dies is assigned a specific grace time slot and is configured to determine when to commence a memory operation sent to it by the controller to ensure that a power peak generated by the memory operation will occur partially or entirely in its assigned grace time slot.
Other embodiments are possible, and each of the embodiments can be used alone or together in combination. Accordingly, various embodiments will now be described with reference to the attached drawings.